In the context of high speed input/output (I/O) for computer systems whereby data is communicated over a bus, integrated circuits are used. Typically, such integrated circuits include a data transmitter, or driver circuit, and a receiver circuit. Such driver circuits can be implemented as current mode drivers or voltage mode drivers. Voltage mode drivers are known to consume far less power in comparison to current mode drivers. Generally, a current mode driver will require 4 times the DC power of its voltage mode counterpart to provide the same output swing.
While voltage mode drivers typically consume less power than current mode drivers, this is not the case where the voltage mode driver implements a finite impulse response (FIR) filter. A FIR filter is used to compensate for channel losses (e.g., from transmission over a PCI bus) and provides frequency dependent voltage adjustment to input signals being fed to the driver. Prior approaches to implementing an FIR filter in a voltage mode driver involved partitioning the driver into several different segments, wherein each segment may have a particular configuration and a combination of the different segment configurations determines the frequency dependent voltage adjustment of input signals fed to the driver. Under this approach, in order to provide high resolution frequency dependent voltage adjustment, a large amount of segmenting is required. Because of the minimum device limit, a large amount of segmenting will result in an increased amount of power consumed by the voltage mode driver thereby eliminating the power consumption advantages typically attributed to voltage mode drivers.